Introduction to VLSI Design

Welcome to the VLSI Design Laboratory !

Welcome to the VLSI Design Laboratory, a cutting-edge facility dedicated to the research, development, and education in the field of Very-Large-Scale Integration (VLSI) design. Our laboratory is at the forefront of innovation, providing students, researchers, and industry professionals with the tools and expertise needed to excel in the rapidly evolving world of semiconductor technology.

List of Experiments

1. Design of a half adder using the block level entries and simulate it on Xilinx.
2. Design of a 3-to-8 decoder using block level entries and simulate it on Xilinx.
3. Design of 8:3 encoder and simulate it using Xilinx.
4. Writing of Code for Full adder using VHDL and its simulation on Xilinx.
5. Design of a 8:1 Multiplexer and its simulation on Xilinx.
6. Design of a JK flip flop from a D flip flop and its simulation on Xilinx.
7. Design of a two input X-OR using CMOS logic (using Proteus Tools).
8. Design of a two input NAND using NMOS logic (using Proteus Tools).
9. Design of a Full Adder circuit using CMOS logic (using Proteus Tools).
10. Design of a common emitter amplifier using an NPN transistor with a gain of 50 plus and offset less than 20% of supply rail (using Proteus Tools).